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 STD90N02L STD90N02L-1
N-channel 25V - 0.0052 - 60A - DPAK - IPAK STripFETTM III Power MOSFET
Features
Type STD90N02L STD90N02L-1

VDSS 25V 25V
RDS(on) Max <0.006 <0.006
ID 60A 60A
3 1
3 2 1
RDS(ON) * Qg industry's benchmark Conduction losses reduced Switching losses reduced Low threshold device In compliance with the 2002/95/ec european directive Figure 1.
DPAK
IPAK
Application
Internal schematic diagram
Switching applications
Description
This series of products utilizes the latest advanced design rules of ST's proprietary STripFETTM technology. This is suitable for the most demanding DC-DC converter application where high efficiency is to be achieved.
Table 1.
Device summary
Order codes Marking D90N02L D90N02L Package IPAK DPAK Packaging Tube Tape & reel
STD90N02L-1 STD90N02L
November 2007
Rev 4
1/17
www.st.com 17
Contents
STD90N02L - STD90N02L-1
Contents
1 2 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1 Electrical characteristics (curves) ............................ 6
3 4 5 6
Test circuits
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
2/17
STD90N02L - STD90N02L-1
Electrical ratings
1
Electrical ratings
Table 2.
Symbol Vspike (1) VDS VDGR VGS ID (2) ID IDM (3) PTOT
Absolute maximum ratings
Parameter Drain-source voltage rating Drain-source voltage (VGS = 0) Drain-gate voltage (RGS = 20k) Gate-source voltage Drain current (continuous) at TC = 25C Drain current (continuous) at TC = 100C Drain current (pulsed) Total dissipation at TC = 25C Derating factor Value 30 25 25 20 60 42 240 70 0.47 360 -55 to 175 Unit V V V V A A A W W/C mJ C
EAS (4) Tj Tstg
Single pulse avalanche energy Operating junction temperature Storage temperature
1. Guaranteed when external Rg=4.7 and TfTable 3.
Symbol
Thermal data
Parameter Value 2.14 100 275 Unit C/W C/W C
Rthj-case Thermal resistance junction-case max. Rthj-amb Thermal resistance junction-amb max. Tl Maximum lead temperature for soldering purpose
3/17
Electrical characteristics
STD90N02L - STD90N02L-1
2
Electrical characteristics
(Tcase =25C unless otherwise specified) Table 4.
Symbol V(BR)DSS IDSS IGSS VGS(th) RDS(on)
On /off states
Parameter Test conditions Min. 25 1 10
100
Typ.
Max.
Unit V A A nA V
Drain-source breakdown ID = 25mA, VGS= 0 voltage Zero gate voltage drain current (VGS = 0) Gate body leakage current (VDS = 0) Gate threshold voltage Static drain-source on resistance VDS = 20V, VDS = 20V,Tc = 125C VGS = 20V VDS= VGS, ID = 250A VGS= 10V, ID= 30A VGS= 5V, ID= 15A
1
1.8 0.0052 0.006 0.007 0.011
Table 5.
Symbol gfs (1) Ciss Coss Crss Qg Qgs Qgd RG QOSS(2)
1.
Dynamic
Parameter Forward transconductance Input capacitance Output capacitance Reverse transfer capacitance Total gate charge Gate-source charge Gate-drain charge Test conditions VDS =10V, ID = 18A Min. Typ. 27 2050 545 70 17 7.7 3.5 22 Max. Unit S pF pF pF nC nC nC nC
VDS =16V, f=1MHz, VGS=0
VDD=10V, ID = 60A VGS =5V (see Figure 17) f=1MHz Gate DC Bias =0 test signal level =20mV open drain VDS =10V, VGS =0V
Gate input resistance
0.5
1.5
3
Output charge
14
Pulsed: pulse duration = 300s, duty cycle 1.5%
2. Qoss.= Coss * D Vin, Coss = Cgd + Cgd. (see Buck converter)
4/17
STD90N02L - STD90N02L-1
Electrical characteristics
Table 6.
Symbol td(on) tr td(off) tf
Switching times
Parameter Turn-on delay time Rise time Turn-off delay time Fall time Test conditions VDD=10V, ID=30A, RG=4.7, VGS=5V (see Figure 16) Min. Typ. 12 110 18 8 Max Unit ns ns ns ns
Table 7.
Symbol ISD ISDM VSD (1) trr Qrr IRRM
Source drain diode
Parameter Source-drain current Source-drain current (pulsed) Forward on voltage Reverse recovery time Reverse recovery charge Reverse recovery current ISD=30A, VGS=0 ISD=60A, di/dt = 100A/s, VDD=15V, Tj=150C (see Figure 18) 36 65 3.6 Test conditions Min. Typ. Max. Unit 60 240 1.3 A A V ns nC A
1. Pulsed: pulse duration = 300s, duty cycle 1.5%
5/17
Electrical characteristics
STD90N02L - STD90N02L-1
2.1
Figure 2.
Electrical characteristics (curves)
Safe operating area Figure 3. Thermal impedance
Figure 4.
Output characteristics
Figure 5.
Transfer characteristics
Figure 6.
Transconductance
Figure 7.
Static drain-source on resistance
6/17
STD90N02L - STD90N02L-1 Figure 8. Gate charge vs gate-source voltage Figure 9.
Electrical characteristics Capacitance variations
Figure 10. Normalized gate threshold voltage vs temperature
Figure 11. Normalized on resistance vs temperature
Figure 12. Source-drain diode forward characteristics
Figure 13. Normalized BVDSS vs temperature
7/17
Electrical characteristics
STD90N02L - STD90N02L-1
Figure 14. Allowable IAV vs time in avalanche
The previous curve gives the single pulse safe operating area for unclamped inductive loads, under the following conditions: PD(AVE) =0.5*(1.3*BVDSS *IAV) EAS(AR) =PD(AVE) *tAV Where: IAV is the allowable current in avalanche PD(AVE) is the average power dissipation in avalanche (single pulse) tAV is the time in avalanche
8/17
STD90N02L - STD90N02L-1
Buck converter
3
Buck converter
Figure 15. Synchronous buck converter
The power losses associated with the FETs in a Synchronous Buck converter can be estimated using the equations shown in the table below. The formulas give a good approximation, for the sake of performance comparison, of how different pairs of devices affect the converter efficiency. However a very important parameter, the working temperature, is not considered. The real device behavior is really dependent on how the heat generated inside the devices is removed to allow for a safer working junction temperature. The low side (SW2) device requires: Very low RDS(on) to reduce conduction losses Small QGLS to reduce the gate charge losses Small COSS to reduce losses due to output capacitance Small Qrr to reduce losses on SW1 during its turn-on The Cgd/Cgs ratio lower than Vth/Vgg ratio especially with low drain to source voltage to avoid the cross conduction phenomenon. The high side (SW1) device requires: Small RG and LG to allow higher gate current peak and to limit the voltage feedback on the gate Small QG to have a faster commutation and to reduce gate charge losses Low RDS(on) to reduce the conduction losses
9/17
Buck converter
STD90N02L - STD90N02L-1
Table 8.
Power losses
High side switch (SW1) Low side switch (SW2) R DS ( on ) * I L * ( 1 - )
2
Pconduction
R DS ( on ) * I L *
2
Pswitching
in
I * ( Q gsth ( SW1 ) + Q gd ( SW1 ) ) * f * I
Zero voltage switching
recovery Pdiode conduction
Not applicable
1
Vin * Q rr ( SW2 ) * f
Not applicable
V f ( SW2 ) * I L * t deadtime * f Q gls ( SW2 ) * V gg * f V in * Q oss ( SW2 ) * f ------------------------------------------------2
Pgate(Qg)
Q g ( SW1 ) * V gg * f V in * Q oss ( SW1 ) * f ------------------------------------------------2
PQoss
Table 9.
Power losses parameters
Meaning Duty-cycle Post threshold gate charge Third quadrant gate charge On state losses On-off transition losses Conduction and reverse recovery diode losses Gate driver losses Output capacitance losses
Parameter d Qgsth Qgls Pconduction Pswitching Pdiode Pgate PQoss
10/17
STD90N02L - STD90N02L-1
Test circuits
4
Test circuits
Figure 17. Gate charge test circuit
Figure 16. Switching times test circuit for resistive load
Figure 18. Test circuit for inductive load Figure 19. Unclamped inductive load test switching and diode recovery times circuit
Figure 20. Unclamped inductive waveform
Figure 21. Switching time waveform
11/17
Package mechanical data
STD90N02L - STD90N02L-1
5
Package mechanical data
In order to meet environmental requirements, ST offers these devices in ECOPACK(R) packages. These packages have a Lead-free second level interconnect. The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at:www.st.com
12/17
STD90N02L - STD90N02L-1
Package mechanical data
TO-251 (IPAK) MECHANICAL DATA
DIM. MIN. A A1 A3 B B2 B3 B5 B6 C C2 D E G H L L1 L2 0.45 0.48 6 6.4 4.4 15.9 9 0.8 0.8 0.3 0.95 0.6 0.6 6.2 6.6 4.6 16.3 9.4 1.2 1 0.017 0.019 0.236 0.252 0.173 0.626 0.354 0.031 0.031 2.2 0.9 0.7 0.64 5.2 mm TYP. MAX. 2.4 1.1 1.3 0.9 5.4 0.85 0.012 0.037 0.023 0.023 0.244 0.260 0.181 0.641 0.370 0.047 0.039 MIN. 0.086 0.035 0.027 0.025 0.204 inch TYP. MAX. 0.094 0.043 0.051 0.031 0.212 0.033
H
C A C2
L2
D
B3 B6
A1
L
=
=
3
B5
B
A3
=
B2
=
G
=
E
L1
1
2
=
0068771-E
13/17
Package mechanical data
STD90N02L - STD90N02L-1
DPAK MECHANICAL DATA
mm. DIM. MIN. A A1 A2 B b4 C C2 D D1 E E1 e e1 H L (L1) L2 L4 R V2 2.2 0.9 0.03 0.64 5.2 0.45 0.48 6 5.1 6.4 4.7 2.28 4.4 9.35 1 2.8 0.8 0.6 0.2 0 8 0 1 0.023 0.008 8 4.6 10.1 0.173 0.368 0.039 0.110 0.031 0.039 6.6 0.252 0.185 0.090 0.181 0.397 TYP MAX. 2.4 1.1 0.23 0.9 5.4 0.6 0.6 6.2 MIN. 0.086 0.035 0.001 0.025 0.204 0.017 0.019 0.236 0.200 0.260 TYP. MAX. 0.094 0.043 0.009 0.035 0.212 0.023 0.023 0.244 inch
0068772-F
14/17
STD90N02L - STD90N02L-1
Package mechanical data
6
Package mechanical data
DPAK FOOTPRINT
All dimensions are in millimeters
TAPE AND REEL SHIPMENT
REEL MECHANICAL DATA
DIM. A B C D G N T 1.5 12.8 20.2 16.4 50 22.4 18.4 13.2 mm MIN. MAX. 330 0.059 0.504 0.520 0.795 0.645 0.724 1.968 0.881 BULK QTY 2500 inch MIN. MAX. 12.992
TAPE MECHANICAL DATA
DIM. A0 B0 B1 D D1 E F K0 P0 P1 P2 R
W
BASE QTY 2500
mm MIN. 6.8 10.4 1.5 1.5 1.65 7.4 2.55 3.9 7.9 1.9 40
15.7 16.3
inch MIN. MAX. 7 0.267 0.275 0.409 0.417 0.476 0.059 0.063 0.059 0.065 0.073 0.291 0.299 0.100 0.108 0.153 0.161 0.311 0.319 0.075 0.082 1.574
0.618 0.641
MAX. 10.6 12.1 1.6 1.85 7.6 2.75 4.1 8.1 2.1
15/17
Revision history
STD90N02L - STD90N02L-1
7
Revision history
Table 10.
Date 29-Aug-2005 07-Apr-2006 03-May-2006 24-Oct-2007
Document revision history
Revision 1 2 3 4 First release New template New value on Table 4, new curve (see Figure 14) Corrected value on Table 6, Updated BVdss value Changes
16/17
STD90N02L - STD90N02L-1
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